Analog & Mixed-signal IC Design @ SNU

2021-2018

S. Shin, M. Kim, J. Park, H. Lee, and S. Kim, "Energy-Efficient Read-Out IC for High-Precision DC Measurement System with Instrumentation Amplifier Power Reduction Technique", In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2021.
H. Park, J. Park, J. W. Lee, Y.-U. Jeong, S.-H.Jeong, S. Kim, and J.-H.Chae, "A High-Accuracy and Fast-Correction Quadrature Signal Corrector Using an Adaptive Delay Gain Controller for Memory Interfaces", In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2021.
H. H. Cheong and S. Kim, "A Power-efficient and Fast-locking Digital Quadrature Clock Generator with Ping-pong Phase Detection", In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2021.
J. Yun, S. Lee, Y.-U. Jeong, S.-H. Jeong, and S. Kim, "A 0.4-1.7GHz Wide Range Fractional-N PLL Using a Transition-Detection DAC for Jitter Reduction", In Proceedings of the IEEE Asian Solid-State Circuits Conference (ASSCC), November 2020.
Y. Ahn, H. Lee, and S. Kim, "A Sub-1 ppm/°C CMOS Bandgap Voltage Reference with Process Tolerant Piecewise Second-Order Curvature Compensation", In Proceedings of the IEEE International SoC Conference (SOCC), September 2020.
Y.-U. Jeong, J. Park, M. Kim, J.-H. Chae, J. Yun, H. Lee, and S. Kim, "A 9Gb/s Wide Output Range Transmitter with 2D Binary-Segmented Driver and Dual-Loop Calibration for Intra-Panel Interfaces", In the Proceedings of International Symposium on Integrated Circuits and Systems, August 2020.
Y. Yang, B. Lee, J. S. Cho, H. Lee, and S. Kim, "A Digital Capacitive MEMS Microphone for Speech Recognition with Fast Wake-up Feature using a Sound Activity Detector", In the Proceedings of International Symposium on Integrated Circuits and Systems, August 2020.
Y.-U. Jeong, H. Park, C. Hyun and S. Kim, "A 28-Gb/s/pin PAM-4 Single-Ended Transmitter with High-Linearity and Impedance-Matched Driver and 3-Point ZQ calibration for Memory Interfaces", In Proceedings of the Proceedings of the IEEE Symposium on VLSI Circuits, June 2020.
Y. Yang, B. Lee, J.Cho and S. Kim, "A Sound Activity Detector Embedded Low-Power MEMS Microphone Readout Interface for Speech Recognition", In Proceedings of the IEEE International Symposium on Low Power Electronics and Design (ISLPED), July 2019.
Y.-U. Jeong, J.-H. Chae, S. Choi, J. Yun, S.-H. Jeong, and S. Kim, "A Low-Power and Low-Noise 20:1 Serializer with Two Calibration Loops in 55-nm CMOS", In Proceedings of the IEEE International Symposium on Low Power Electronics and Design (ISLPED), July 2019.
H.-G. Ko, S. Shin, C.-H. Kye, S.-Y. Lee, J. Yun, H.-K. Jung, D. Lee, S. Kim, and D.-K. Jeong, "A 370-fJ/b, 0.0056 mm2/DQ, 4.8-Gb/s DQ Receiver for HBM3 with a Baud-Rate Self-Tracking Loop", In Proceedings of the Symposium on VLSI Circuits, June 2019.
J. Jun, J. Kang, and S. Kim, "A 16 bit Incremental ADC with Swapping DAC for Low Power Sensor Applications", In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2019.
C. Hyun, H. Ko, J. -H. Chae, H. Park, and S. Kim, "A 20Gb/s Dual-Mode PAM4/NRZ Single-Ended Transmitter with RLM Compensation", In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2019.
J.-W. Lee, J.-H. Chae, J. Park, H. Park, J. Yun, and S. Kim, "Energy-Efficient Dynamic Comparator with Active Inductor for Receiver of Memory Interfaces", In Proceedings of the IEEE International Symposium on Low Power Electronics and Design (ISLPED), July 2018.
J. Jun, C. Rhee, M.-S. Kim, J. Kang, and S. Kim, "A 21.8-bit Sub-100 µHz 1/f Corner 2.4 µV Offset Programmable-Gain Read-Out IC for Bridge Measurement Systems", In Proceedings of the IEEE International Solid-State Circuits Conference (ISSCC), February 2018.
H. Yang, S. Kim, T. Kim, and S. Kim, "A 12-bit 3 MS/s Asynchronous Comparator-Based Cyclic ADC with an Adjustable Threshold Voltage Comparator", In Proceedings of the International Conference on Electronics, Information, and Communication (ICEIC), January 2018.

2017 & Past

J. Park, J.-H. Chae, Y.-U. Jeong, J.-W. Lee, and S. Kim, "A 2.1Gbps 12-Channel Transmitter with Phase Emphasis Embedded Serializer for UHD Intra-panel Interface", In Proceedings of the IEEE Asian Solid-State Circuits Conference (ASSCC), pp. 257-260, November 2017.
T. Kim and S. Kim, "A 12.1mW, 60dB SNR, 8-Channel Beamforming Embedded SAR ADC for Ultrasound Imaging Systems", In Proceedings of the IEEE Asian Solid-State Circuits Conference (ASSCC), pp. 141-144, November 2017.
M. Kim, J. Park, J.-H. Chae, H. Ko, M. Kim, and S. Kim, "An 8Gb/s Adaptive DFE with Level Calibration using Training Data Pattern for Mobile DRAM Interface", In Proceedings of the 14th Internatinal SoC Design Conference (ISOCC), November 2017.
Y. Yang, J. Jun, and S. Kim, "A Low-pass Continuous-time Delta-Sigma Interface Circuit for Wideband MEMS Gyroscope Readout ASIC", In Proceedings of the IEEE International SoC Conference (ISOCC), September 2017.
H. Kim, Y. Park, Y. Han, and S. Kim, "A Constant Bandwidth Switched-Capacitor Programmable-Gain Amplifier Utilizing Adaptive Miller Compensation Technique", In Proceedings of the IEEE International SoC Conference (ISOCC), September 2017.
J. Park, G.-M. Hong, M. Kim, J.-H. Chae, and S. Kim, "A 0.13pJ/bit, Referenceless Transceiver with Clock Edge Modulation for a Wired Intra-BAN Communication", In Proceedings of the IEEE International Symposium on Low Power Electronics and Design (ISLPED), July 2017.
H. Yang, J. S. Cho, Y. Yang, and S. Kim, "A Load Variation Tolerant Readout Interface for High Linear MEMS Capacitive Microphones", In Proceedings of the IEEE International Symposium on Circuits & Systems (ISCAS), May 2017.
S. Yim, Y. Park, H. Yang, and S. Kim, "Power efficient SAR ADC adaptive to input activity for ECG monitoring applications", in Proceedings of the IEEE International Symposium on Circuits & Systems (ISCAS), pp. 898-901, May 2017.
D. Ha, Y. Park, and S. Kim, "A Current-Mirror Technique Used for High-Order Curvature Compensated Bandgap Reference in Automotive Application", In Proceedings of the IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), October 2016.
T. Kim, H. Yang, S. Shin, H. Lee, and S. Kim, "A CMOS Analog Front-End for Driving a High-Speed SAR ADC in Low-Power Ultrasound Imaging Systems", In Proceedings of the IEEE International SoC Conference (SOCC), September 2016.
J. Jun, C. Rhee, and S. Kim, "A 386-uW, 15.2-bit Programmable-Gain Embedded Delta-Sigma ADC for Sensor Applications", In Proceedings of the IEEE International Symposium on Low Power Electronics and Design (ISLPED), August 2016.
J.-W. Lee, M. Kim, J. Park, G.-M. Hong and S. Kim, "Phase Shift Keying Demodulator with Decision Feedback Phase-Locked Loop", In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), pp.1550-1553, May 2016.
H. Lee and S. Kim, "Integer-Based Split-Capacitor DAC using Redundancy for High-Resolution SAR ADC", In Proceedings of the International Conference on Electronics, Information, and Communication, Jan, 27-30 2016.
C. Rhee and S. Kim, "A low power, small-area and linearity-compensated CMOS temperature sensor", In Proceedings of the International Conference on Electronics, Information, and Communication, Jan,27-30 2016.
J.-H. Chae, G.-M. Hong, J. Park, M. Kim, H. Ko, W.-Y. Shin, H. Chi, D.-K. Jeong, and S. Kim, "A 1.74mW/GHz 0.11-2.5GHz Fast-Locking, Jitter-Reducing, 180?Phase-Shift Digital DLL with a Window Phase Detector for LPDDR4 Memory Controllers", In Proceedings of the IEEE Asian Solid-State Conference,pp.109-112, November 9-11, 2015.
T. Kim, S. Kim, J-K. Woo, H. Lee, and S. Kim, "A 9-bit, 110-MS/s Pipelined-SAR ADC Using Time-Interleaved Technique with Shared Comparator", In Proceedings of the IEEE International SoC Conference,pp. 170-174, September 8-11, 2015.
Y. Park, H. Yang, H. Kim, J. S. Cho, and S. Kim, "Low Noise Output Stage for Oversampling Audio DAC", In Proceedings of the IEEE International SoC Conference, pp.277-230, September 8-11, 2015.
J. S. Cho, H. Lee, C. Rhee, and S. Kim, "Design of a Stereo Audio Sigma Delta ADC with 92.4 dB SNR and -88.3 dB THD+N", In Proceedings of the 30th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC),pp.611-612, June 29 - July 2, 2015.
J. Yoon, J-H. Oh, J.-H. Park, S. Kim, and D. Lee, "Autonomous Dynamic Driving Control of Wheeled Mobile Robots", In Proceedings of the IEEE International Conference on Robotics and Automation, pp. 5274-5279, May 31 - June 7, 2014.
S.-I. Na, S. Kim, T. Kim, H. Lee, H. Lee, and S. Kim, "A 32-Channel Neural Recording System with a Liquid-Crystal Polymer MEA", In Proceedings of the IEEE BioCAS, pp. 13-16, October 31-November 2, 2013.
M. Kim, W.-Y. Shin, G.-M. Hong, J. Park, J.-H. Chae, N. Xing, J.-K. Woo, and S. Kim, "High-Resolution and Wide-Dynamic Range Time-to-Digital Converter with a Multi-Phase Cyclic Vernier Delay Line", In Proceedings of the European Solid-State Circuits Conference, pp. 311-314, September 16-20, 2013.
S. Yim, B. Lee, K. Kang, and S. Kim, "Behavioral Modeling of a Two-Stage Average-Current-Mode-Controlled PFC Converter for Dimmable MR16 LED Lamp", In Proceedings of the International SoC Design Conference, Busan, Korea, 2013, pp. 380-383., .
S. Kim, S.-I. Na, T.-H. Kim, H. Lee, S. Kim, C. Rhee, and S. Kim, "Neural Recording System with Low-Noise Analog Front-End and Comparator-Based Cyclic ADC", In Proceedings of the IEEE International SoC Conference,pp.110-114, September 12-14, 2012.
J. Park, G.-M. Hong, S. Kim, "Comparison of phase rotator performance and proposal of design method", 27th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), July 2012.
B. An, S. Kim, "A Bandgap Reference with Simple Method for Improved PSR at Moderate Frequency", 27th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), July 2012.
H. Lee, J.-K. Woo, M. Kim, and S. Kim, "Dififerential Capacitance-to-Digital Converter Utilizing Time-Domain Manipulation of Intermediate Signals", In Proceedings of the 54nd Midwest Symposium on Circuits and Systems, pp. 1-4, August 2011.
[Best Paper Award, ISLPED'11] S. Kim, J.-K. Woo, W.-Y. Shin, G. Hong, H. Lee, H. Lee, S. Kim, "A Low-Power Referenceless Clock and Data Recovery Circuit with Clock-Edge Modulation for Biomedical Sensor Applications", In Proceedings of International Symposium on Low Power Electronics and Design, pp. 347-350, August 2011.
J.-K. Woo, T.-H. Kim, H. Lee, S. Kim, H. Lee, and S. Kim, "A Comparator-Based Cyclic Analog-to-Digital Converter with Boosted Preset Voltage", In Proceedings of International Symposium on Low Power Electronics and Design, pp. 199-204, August 2011.
H. Lee, H. Lee, J.-K. Woo, S. Kim, and S. Kim, "A CMOS Readout Integrated Circuit with Wide Dynamic Range for a CNT Bio-Sensor", In Proceedings of International Symposium on Low Power Electronics and Design, pp. 357-360, August 2011.
R. Singh, J.-C. Son, U. Cho, G. Jung, M.-S. Kim, H. Lee, and S. Kim, "A Static-Switching Pulse Domino Technique for Statistical Power Reduction of Wide Fan-in Dynamic Gates", accepted for publication in Proceedings of the Great Lake Symposium on VLSI, pp. 127-132, May 2011.
W.-Y. Shin, G.-M. Hong, H. Lee, J.-D. Han, K.-S. Park, D.-H. Lim, S. Kim, J.-H. Chun, D.-K. Jeong, S. Kim, "A 4.8Gb/s Impedance-Matched Bi-Directional Multi-Drop Transceiver for High Capacity Memory Interface", In Proceedings of the IEEE International Solid-State Circuits Conference, pp. 494-495, February 2011.
J. C. Kao, W.-H. Ma, S. Kim, and M. Papaefthymiou, "2.07 GHz Floating-Point Unit with Fine-Grain Resonant-Clock Logic", In Proceedings of the IEEE Asian Solid-State Conference, November 8-10, 2010.
J.-D. Han, W.-Y. Shin, W.-S. Choi, J.-H. Chun, S. Kim, and D.-K. Jeong, "A 5-Gb/s Digitally Controlled 3-Tap DFE Receiver for Serial Communications", In Proceedings of the IEEE Asian Solid-State Conference, November 8-10, 2010.
R. Singh, A.-R. Kim, and S. Kim, "Footer Voltage Feedforward Domino Technique for Wide Fan-In Dynamic Logic", In Proceedings of the IEEE International SoC Conference, pp. 224-229, September 27-29, 2010.
J.-K. Woo, H. Lee, S. Ahn, and S. Kim, "A High Resolution Fast-Conversion Readout Circuit for Differential Capacitive Sensors", In Proceedings of the IEEE International SoC Conference, pp. 44-47, September 27-29, 2010.
R. Singh, A.-R. Kim, and S. Kim, "A Three-Step Power-Gating Turn-on Technique for Controlling Ground Bounce Noise", In Proceedings of the 2010 International Symposium on Low Power Electronics and Design, pp. 171-176, August 18-20, 2010.
B. Lee, S. Seo, M. Sung, D. Lee, M. Lee, J. Lee, J. Cheon, E. Cho, H. Lee, I. Chung, Y. Park, S. Kim and S. Hong, "Integration of Uniform Arrays of Carbon Nanotube-Based Biosensors and CMOS Signal-Processing Circuits into a System-on-a-Chip", 217th Electrochemical Society (ECS) Meeting, April 25-30, 2010.
B. Y. Lee, et. al, "Scaling Behavior of Carbon Nanotube-based Biosensors Integrated on CMOS Signal-processing Circuits", APS March Meeting, March 15-19, 2010.
D.-S. Kim, H. Song, T. Kim, S. Kim, and D.-K. Jeong, "A 1.35GHz All-Digital Fractional-N PLL with Adaptive Loop Gain Controller and Fractional Divider", In Proceedings of the IEEE Asian Solid-State Conference, pp. 161-164, November 16-18, 2009.
M. Kim, N. Xing, D.-Y. Shin, H. Lee, and S. Kim, "A High Resolution Capacitance Deviation-to-Digital Converter utilizing Time Stretching", In Proceedings of the IEEE International SoC Conference, pp. 83-86, September 9-11, 2009.
N. Xing, H. Song, D.-K. Jeong, and S. Kim, "A PVT-Insensitive Time-to-Digital Converter using Fractional Difference Vernier Delay Lines", In Proceedings of the IEEE International SoC Conference, pp. 43-46, September 9-11, 2009.
D.-Y. Shin, J.-K. Woo, Y. Hong, S. Kim, "Quantification of Image Sticking for Images with Different Long-Range Non-Uniformity", In Proceedings of the 2009 International Symposium, Seminar, and Exhibition, pp.1386-1388, May 31- June 5, 2009.
J.-K. Woo, D.-Y. Shin, W.-J. Choe, D.-K. Jeong, S. Kim, "10-Bit Column Driver with Split-DAC Architecture", In Proceedings of the 2008 International Symposium, Seminar, and Exhibition, pp. 892-895, May 18-23, 2008.
D.-Y. Shin, J.-K. Woo, Y. Hong, S. Kim, "A New Hybrid Analog-Digital Driving Method to Improve AMOLED Lifetime", In Proceedings of the 2008 International Symposium, Seminar, and Exhibition, pp. 1196-1199, May 18-23, 2008.
J.-K. Kim, J. Kim, S.-Y. Lee, S. Kim, and D.-K. Jeong, "A 26.5-37.5 GHz Frequency Divider and a 73-GHz-BW CML Buffer in 0.13 um CMOS", In Proceedings of the IEEE Asian Solid-State Circuits Conference, pp. 148-151, November 2007.
M.-S. Hwang, S.-Y. Lee, J.-K. Kim, S. Kim, and D.-K. Jeong, "A 180-Mb/s to 3.2-Gb/s, Continuous-Rate, Fast-Locking CDR without Using External Reference Clock", In Proceedings of the IEEE Asian Solid-State Circuits Conference, pp. 144-147, November 2007.
H. Kim, S. Kim, S. W. Chang, D. Lee, D. S. Jeong, H. K. Chung, and Y. Hong, "Frequency Dependence of OLED Voltage Shift Degradation", In Proceedings of the International Meeting on Information Display, pp. 1108-1111, August 2007.
D.-H. Oh, D.-S. Kim, S. Kim, D.-K. Jeong, W. Kim, "A 2.8Gb/s All-Digital CDR with a 10b Monotonic DCO", In Proceedings of the IEEE International Solid-State Circuits Conference, pp.222-223, February 2007.
J.-K. Woo, H. Lee, W.-Y. Shin, H. Song, D.-K. Jeong and S. Kim, "A Fast-Locking CDR circuit with an Autonomously Reconfigurable Charge Pump and Loop Filter", In Proceedings of the IEEE Asian Solid-State Circuits Conference, pp. 411-414, November 2006.
Y.-D. Kim, H.-S. Ahn, J.-Y. Park, S. Kim, and D.-K. Jeong, "A Storage- and Power-Efficient Range-Matching TCAM for Packet Classification", In Proceedings of the IEEE International Solid-State Circuits Conference, pp.21-23, February 2006.
V. S. Sathe, J.-Y. Chueh, J. Kim, C. H. Ziesler, S. Kim, and M. C. Papaefthymiou, "Fast Efficient, Recovering, and Irreversible", In Proceedings of the ACM International Conference on Computing Frontiers, pp. 407-413, May 2005.
V. S. Sathe, C. H. Ziesler, M. C. Papaefthymiou, S. Kim, and S. V. Kosonocky, "A Synchronous Interface for SoCs with Multiple Voltage and Clock Domains", In Proceedings of the IEEE International SOC Conference, September 2004.
S. Kim, S. V. Kosonocky, D. R. Knebel, and K. Stawiasz, "Experimental measurement of a novel power gating structure with intermediate power saving mode", In Proceedings of the 2004 International Symposium on Low Power Electronics and Design, pp. 20--25, August 2004.
S.-S. Chin, S. Hong, and S. Kim, "Usage of Application-Specific Switching Activity for Energy Minimization of Arithmetic Units", In Proceedings of the IEEE Computer Annual Symposium on VLSI, February, 2004.
C. H. Ziesler, J. Kim, M. C. Papaefthymiou, and S Kim, "Energy Recovery Design for Low-Power ASICs", In Proceedings of IEEE International SOC Conference, pp. 424-427, September 2003.
S. Kim, S. V. Kosonocky, D. R. Knebel, K. Stawiasz, D. Heidel, and M. Immediato, "Minimizing Inductive Noise in System-On-a-Chip with Multiple Power Gating Structures", In Proceedings of the 29th European Solid-State Circuits Conference, pp. 635-638, September 2003.
[Most Frequently Cited, First-Ever addressed Power Gating induced Power/Ground Noise] S. Kim, S. V. Kosonocky, and D. R. Knebel, "Understanding and Minimizing Ground Bounce In Mode Transition of Power Gating Structures", In Proceedings of the 2003 International Symposium on Low Power Electronics and Design, pp. 22-25, August 2003.
S. Hong, S.-S. Chin, S. Kim, and W. Hwang, "Multiplier Architecture Power Consumption Characterization for Low-Power DSP Applications", In Proceedings of the 9th IEEE International Conference on Electronics, Circuits and Systems, pp.741-744, September 2002.
S. Kim, Y. Shin, S. V. Kosonocky and W. Hwang, "Long-Term Power Minimization of Dual-Vt CMOS circuits", In Proceedings of the 15th Annual 2002, IEEE International ASIC/SOC Conference, pp.323-327, September 2002.
S. Kim et al, "A Resonant Clock Generator for Single-Phase Adiabatic Systems", In Proceedings of the 2001 International Symposium on Low Power Electronics and Design, pp. 159--164, August 2001.
[First Prize in Design Contestof the 2001 ACM/IEEE DAC] S. Kim, C. H. Ziesler and M. C. Papaefthymiou, "A True Single-Phase 8-bit Adiabatic Multiplier", In Proceedings of the 38th Design Automation Conference, pp.758--763, June 2001.
S. Kim, C. H. Ziesler, and M. C. Papaefthymiou, "Design, Verification, and Test of A True Single-Phase Adiabatic Multiplier", In Proceedings of the 2001 Conference on Advanced Research in VLSI, pp.42--58, March 2001.
S. Kim, C. H. Ziesler, and M. C. Papaefthymiou, , "A Reconfigurable Pipelined IDCT for Low-Energy Video Processing", In Proceedings of the 13th Annual 2000 IEEE International ASIC/SOC Conference, pp. 13-17, September 2000.
S. Kim and M. C. Papaefthymiou, "Reconfigurable Low Energy Multiplier for Multimedia System Design", In Proceedings of the 2000 IEEE Computer Society Annual Workshop on VLSI, pp.129-134, April 2000.
S. Kim and M. C. Papaefthymiou, "Low-Energy Adder Design with Single-Phase Source-Coupled Adiabatic Logic", In Proceedings of the 1999 International Workshop on Power and Timing Modeling, Optimization and Simulation, pp.93-102, October 1999.
S. Hong, S. Kim, M. C. Papaefthymiou, and W. E. Stark, "Low-Power Parallel Multiplier Design for DSP applications through Coefficient Optimization", In Proceedings of the 12th Annual 1999 IEEE International ASIC/SOC Conference, pp.286-290, September 1999.
S. Kim and M. C. Papaefthymiou, "Single-Phase Source-Coupled Adiabatic Logic", In Proceedings of the 1999 International Symposium on Low Power Electronics and Design, pp.97--99, August 1999.
S. Kim et al, "Power-Complexity Analysis of Pipelined VLSI FFT Architectures for Low Energy Wireless Communication Applications", In Proceedings of the 42nd Midwest Symposium on Circuits and Systems, pp.313-316, August 1999.
S. Kim and M. C. Papaefthymiou, "Pipelined DSP Design with True Single-Phase Energy-Recovering Logic Style", In Proceedings of the IEEE Alessandro Volta Memorial Workshop on Low Power Design, pp.135-143, March 1999.
S. Kim and M. C. Papaefthymiou, "True Single-Phase Energy-Recovering Logic for Low-Power, High-Speed VLSI", In Proceedings of the 1998 International Symposium on Low Power Electronics and Design, pp.167-172, August 1998.

Conference

2021-2018

S. Shin, M. Kim, J. Park, H. Lee, and S. Kim, "Energy-Efficient Read-Out IC for High-Precision DC Measurement System with Instrumentation Amplifier Power Reduction Technique", In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2021.

H. Park, J. Park, J. W. Lee, Y.-U. Jeong, S.-H.Jeong, S. Kim, and J.-H.Chae, "A High-Accuracy and Fast-Correction Quadrature Signal Corrector Using an Adaptive Delay Gain Controller for Memory Interfaces", In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2021.

H. H. Cheong and S. Kim, "A Power-efficient and Fast-locking Digital Quadrature Clock Generator with Ping-pong Phase Detection", In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2021.

J. Yun, S. Lee, Y.-U. Jeong, S.-H. Jeong, and S. Kim, "A 0.4-1.7GHz Wide Range Fractional-N PLL Using a Transition-Detection DAC for Jitter Reduction", In Proceedings of the IEEE Asian Solid-State Circuits Conference (ASSCC), November 2020.

Y. Ahn, H. Lee, and S. Kim, "A Sub-1 ppm/°C CMOS Bandgap Voltage Reference with Process Tolerant Piecewise Second-Order Curvature Compensation", In Proceedings of the IEEE International SoC Conference (SOCC), September 2020.

Y.-U. Jeong, J. Park, M. Kim, J.-H. Chae, J. Yun, H. Lee, and S. Kim, "A 9Gb/s Wide Output Range Transmitter with 2D Binary-Segmented Driver and Dual-Loop Calibration for Intra-Panel Interfaces", In the Proceedings of International Symposium on Integrated Circuits and Systems, August 2020.

Y. Yang, B. Lee, J. S. Cho, H. Lee, and S. Kim, "A Digital Capacitive MEMS Microphone for Speech Recognition with Fast Wake-up Feature using a Sound Activity Detector", In the Proceedings of International Symposium on Integrated Circuits and Systems, August 2020.

Y.-U. Jeong, H. Park, C. Hyun and S. Kim, "A 28-Gb/s/pin PAM-4 Single-Ended Transmitter with High-Linearity and Impedance-Matched Driver and 3-Point ZQ calibration for Memory Interfaces", In Proceedings of the Proceedings of the IEEE Symposium on VLSI Circuits, June 2020.

Y. Yang, B. Lee, J.Cho and S. Kim, "A Sound Activity Detector Embedded Low-Power MEMS Microphone Readout Interface for Speech Recognition", In Proceedings of the IEEE International Symposium on Low Power Electronics and Design (ISLPED), July 2019.

Y.-U. Jeong, J.-H. Chae, S. Choi, J. Yun, S.-H. Jeong, and S. Kim, "A Low-Power and Low-Noise 20:1 Serializer with Two Calibration Loops in 55-nm CMOS", In Proceedings of the IEEE International Symposium on Low Power Electronics and Design (ISLPED), July 2019.

H.-G. Ko, S. Shin, C.-H. Kye, S.-Y. Lee, J. Yun, H.-K. Jung, D. Lee, S. Kim, and D.-K. Jeong, "A 370-fJ/b, 0.0056 mm2/DQ, 4.8-Gb/s DQ Receiver for HBM3 with a Baud-Rate Self-Tracking Loop", In Proceedings of the Symposium on VLSI Circuits, June 2019.

J. Jun, J. Kang, and S. Kim, "A 16 bit Incremental ADC with Swapping DAC for Low Power Sensor Applications", In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2019.

C. Hyun, H. Ko, J. -H. Chae, H. Park, and S. Kim, "A 20Gb/s Dual-Mode PAM4/NRZ Single-Ended Transmitter with RLM Compensation", In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2019.

J.-W. Lee, J.-H. Chae, J. Park, H. Park, J. Yun, and S. Kim, "Energy-Efficient Dynamic Comparator with Active Inductor for Receiver of Memory Interfaces", In Proceedings of the IEEE International Symposium on Low Power Electronics and Design (ISLPED), July 2018.

J. Jun, C. Rhee, M.-S. Kim, J. Kang, and S. Kim, "A 21.8-bit Sub-100 µHz 1/f Corner 2.4 µV Offset Programmable-Gain Read-Out IC for Bridge Measurement Systems", In Proceedings of the IEEE International Solid-State Circuits Conference (ISSCC), February 2018.

H. Yang, S. Kim, T. Kim, and S. Kim, "A 12-bit 3 MS/s Asynchronous Comparator-Based Cyclic ADC with an Adjustable Threshold Voltage Comparator", In Proceedings of the International Conference on Electronics, Information, and Communication (ICEIC), January 2018.

2017 & Past

J. Park, J.-H. Chae, Y.-U. Jeong, J.-W. Lee, and S. Kim, "A 2.1Gbps 12-Channel Transmitter with Phase Emphasis Embedded Serializer for UHD Intra-panel Interface", In Proceedings of the IEEE Asian Solid-State Circuits Conference (ASSCC), pp. 257-260, November 2017.

T. Kim and S. Kim, "A 12.1mW, 60dB SNR, 8-Channel Beamforming Embedded SAR ADC for Ultrasound Imaging Systems", In Proceedings of the IEEE Asian Solid-State Circuits Conference (ASSCC), pp. 141-144, November 2017.

M. Kim, J. Park, J.-H. Chae, H. Ko, M. Kim, and S. Kim, "An 8Gb/s Adaptive DFE with Level Calibration using Training Data Pattern for Mobile DRAM Interface", In Proceedings of the 14th Internatinal SoC Design Conference (ISOCC), November 2017.

Y. Yang, J. Jun, and S. Kim, "A Low-pass Continuous-time Delta-Sigma Interface Circuit for Wideband MEMS Gyroscope Readout ASIC", In Proceedings of the IEEE International SoC Conference (ISOCC), September 2017.

H. Kim, Y. Park, Y. Han, and S. Kim, "A Constant Bandwidth Switched-Capacitor Programmable-Gain Amplifier Utilizing Adaptive Miller Compensation Technique", In Proceedings of the IEEE International SoC Conference (ISOCC), September 2017.

J. Park, G.-M. Hong, M. Kim, J.-H. Chae, and S. Kim, "A 0.13pJ/bit, Referenceless Transceiver with Clock Edge Modulation for a Wired Intra-BAN Communication", In Proceedings of the IEEE International Symposium on Low Power Electronics and Design (ISLPED), July 2017.

H. Yang, J. S. Cho, Y. Yang, and S. Kim, "A Load Variation Tolerant Readout Interface for High Linear MEMS Capacitive Microphones", In Proceedings of the IEEE International Symposium on Circuits & Systems (ISCAS), May 2017.

S. Yim, Y. Park, H. Yang, and S. Kim, "Power efficient SAR ADC adaptive to input activity for ECG monitoring applications", in Proceedings of the IEEE International Symposium on Circuits & Systems (ISCAS), pp. 898-901, May 2017.

D. Ha, Y. Park, and S. Kim, "A Current-Mirror Technique Used for High-Order Curvature Compensated Bandgap Reference in Automotive Application", In Proceedings of the IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), October 2016.

T. Kim, H. Yang, S. Shin, H. Lee, and S. Kim, "A CMOS Analog Front-End for Driving a High-Speed SAR ADC in Low-Power Ultrasound Imaging Systems", In Proceedings of the IEEE International SoC Conference (SOCC), September 2016.

J. Jun, C. Rhee, and S. Kim, "A 386-uW, 15.2-bit Programmable-Gain Embedded Delta-Sigma ADC for Sensor Applications", In Proceedings of the IEEE International Symposium on Low Power Electronics and Design (ISLPED), August 2016.

J.-W. Lee, M. Kim, J. Park, G.-M. Hong and S. Kim, "Phase Shift Keying Demodulator with Decision Feedback Phase-Locked Loop", In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), pp.1550-1553, May 2016.

H. Lee and S. Kim, "Integer-Based Split-Capacitor DAC using Redundancy for High-Resolution SAR ADC", In Proceedings of the International Conference on Electronics, Information, and Communication, Jan, 27-30 2016.

C. Rhee and S. Kim, "A low power, small-area and linearity-compensated CMOS temperature sensor", In Proceedings of the International Conference on Electronics, Information, and Communication, Jan,27-30 2016.

T. Kim, S. Kim, J-K. Woo, H. Lee, and S. Kim, "A 9-bit, 110-MS/s Pipelined-SAR ADC Using Time-Interleaved Technique with Shared Comparator", In Proceedings of the IEEE International SoC Conference,pp. 170-174, September 8-11, 2015.

Y. Park, H. Yang, H. Kim, J. S. Cho, and S. Kim, "Low Noise Output Stage for Oversampling Audio DAC", In Proceedings of the IEEE International SoC Conference, pp.277-230, September 8-11, 2015.

J. S. Cho, H. Lee, C. Rhee, and S. Kim, "Design of a Stereo Audio Sigma Delta ADC with 92.4 dB SNR and -88.3 dB THD+N", In Proceedings of the 30th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC),pp.611-612, June 29 - July 2, 2015.

J. Yoon, J-H. Oh, J.-H. Park, S. Kim, and D. Lee, "Autonomous Dynamic Driving Control of Wheeled Mobile Robots", In Proceedings of the IEEE International Conference on Robotics and Automation, pp. 5274-5279, May 31 - June 7, 2014.

S.-I. Na, S. Kim, T. Kim, H. Lee, H. Lee, and S. Kim, "A 32-Channel Neural Recording System with a Liquid-Crystal Polymer MEA", In Proceedings of the IEEE BioCAS, pp. 13-16, October 31-November 2, 2013.

M. Kim, W.-Y. Shin, G.-M. Hong, J. Park, J.-H. Chae, N. Xing, J.-K. Woo, and S. Kim, "High-Resolution and Wide-Dynamic Range Time-to-Digital Converter with a Multi-Phase Cyclic Vernier Delay Line", In Proceedings of the European Solid-State Circuits Conference, pp. 311-314, September 16-20, 2013.

S. Yim, B. Lee, K. Kang, and S. Kim, "Behavioral Modeling of a Two-Stage Average-Current-Mode-Controlled PFC Converter for Dimmable MR16 LED Lamp", In Proceedings of the International SoC Design Conference, Busan, Korea, 2013, pp. 380-383., .

S. Kim, S.-I. Na, T.-H. Kim, H. Lee, S. Kim, C. Rhee, and S. Kim, "Neural Recording System with Low-Noise Analog Front-End and Comparator-Based Cyclic ADC", In Proceedings of the IEEE International SoC Conference,pp.110-114, September 12-14, 2012.

J. Park, G.-M. Hong, S. Kim, "Comparison of phase rotator performance and proposal of design method", 27th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), July 2012.

B. An, S. Kim, "A Bandgap Reference with Simple Method for Improved PSR at Moderate Frequency", 27th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), July 2012.

H. Lee, J.-K. Woo, M. Kim, and S. Kim, "Dififerential Capacitance-to-Digital Converter Utilizing Time-Domain Manipulation of Intermediate Signals", In Proceedings of the 54nd Midwest Symposium on Circuits and Systems, pp. 1-4, August 2011.

J.-K. Woo, T.-H. Kim, H. Lee, S. Kim, H. Lee, and S. Kim, "A Comparator-Based Cyclic Analog-to-Digital Converter with Boosted Preset Voltage", In Proceedings of International Symposium on Low Power Electronics and Design, pp. 199-204, August 2011.

H. Lee, H. Lee, J.-K. Woo, S. Kim, and S. Kim, "A CMOS Readout Integrated Circuit with Wide Dynamic Range for a CNT Bio-Sensor", In Proceedings of International Symposium on Low Power Electronics and Design, pp. 357-360, August 2011.

R. Singh, J.-C. Son, U. Cho, G. Jung, M.-S. Kim, H. Lee, and S. Kim, "A Static-Switching Pulse Domino Technique for Statistical Power Reduction of Wide Fan-in Dynamic Gates", accepted for publication in Proceedings of the Great Lake Symposium on VLSI, pp. 127-132, May 2011.

J. C. Kao, W.-H. Ma, S. Kim, and M. Papaefthymiou, "2.07 GHz Floating-Point Unit with Fine-Grain Resonant-Clock Logic", In Proceedings of the IEEE Asian Solid-State Conference, November 8-10, 2010.

J.-D. Han, W.-Y. Shin, W.-S. Choi, J.-H. Chun, S. Kim, and D.-K. Jeong, "A 5-Gb/s Digitally Controlled 3-Tap DFE Receiver for Serial Communications", In Proceedings of the IEEE Asian Solid-State Conference, November 8-10, 2010.

R. Singh, A.-R. Kim, and S. Kim, "Footer Voltage Feedforward Domino Technique for Wide Fan-In Dynamic Logic", In Proceedings of the IEEE International SoC Conference, pp. 224-229, September 27-29, 2010.

J.-K. Woo, H. Lee, S. Ahn, and S. Kim, "A High Resolution Fast-Conversion Readout Circuit for Differential Capacitive Sensors", In Proceedings of the IEEE International SoC Conference, pp. 44-47, September 27-29, 2010.

R. Singh, A.-R. Kim, and S. Kim, "A Three-Step Power-Gating Turn-on Technique for Controlling Ground Bounce Noise", In Proceedings of the 2010 International Symposium on Low Power Electronics and Design, pp. 171-176, August 18-20, 2010.

B. Y. Lee, et. al, "Scaling Behavior of Carbon Nanotube-based Biosensors Integrated on CMOS Signal-processing Circuits", APS March Meeting, March 15-19, 2010.

D.-S. Kim, H. Song, T. Kim, S. Kim, and D.-K. Jeong, "A 1.35GHz All-Digital Fractional-N PLL with Adaptive Loop Gain Controller and Fractional Divider", In Proceedings of the IEEE Asian Solid-State Conference, pp. 161-164, November 16-18, 2009.

M. Kim, N. Xing, D.-Y. Shin, H. Lee, and S. Kim, "A High Resolution Capacitance Deviation-to-Digital Converter utilizing Time Stretching", In Proceedings of the IEEE International SoC Conference, pp. 83-86, September 9-11, 2009.

N. Xing, H. Song, D.-K. Jeong, and S. Kim, "A PVT-Insensitive Time-to-Digital Converter using Fractional Difference Vernier Delay Lines", In Proceedings of the IEEE International SoC Conference, pp. 43-46, September 9-11, 2009.

D.-Y. Shin, J.-K. Woo, Y. Hong, S. Kim, "Quantification of Image Sticking for Images with Different Long-Range Non-Uniformity", In Proceedings of the 2009 International Symposium, Seminar, and Exhibition, pp.1386-1388, May 31- June 5, 2009.

J.-K. Woo, D.-Y. Shin, W.-J. Choe, D.-K. Jeong, S. Kim, "10-Bit Column Driver with Split-DAC Architecture", In Proceedings of the 2008 International Symposium, Seminar, and Exhibition, pp. 892-895, May 18-23, 2008.

D.-Y. Shin, J.-K. Woo, Y. Hong, S. Kim, "A New Hybrid Analog-Digital Driving Method to Improve AMOLED Lifetime", In Proceedings of the 2008 International Symposium, Seminar, and Exhibition, pp. 1196-1199, May 18-23, 2008.

J.-K. Kim, J. Kim, S.-Y. Lee, S. Kim, and D.-K. Jeong, "A 26.5-37.5 GHz Frequency Divider and a 73-GHz-BW CML Buffer in 0.13 um CMOS", In Proceedings of the IEEE Asian Solid-State Circuits Conference, pp. 148-151, November 2007.

M.-S. Hwang, S.-Y. Lee, J.-K. Kim, S. Kim, and D.-K. Jeong, "A 180-Mb/s to 3.2-Gb/s, Continuous-Rate, Fast-Locking CDR without Using External Reference Clock", In Proceedings of the IEEE Asian Solid-State Circuits Conference, pp. 144-147, November 2007.

H. Kim, S. Kim, S. W. Chang, D. Lee, D. S. Jeong, H. K. Chung, and Y. Hong, "Frequency Dependence of OLED Voltage Shift Degradation", In Proceedings of the International Meeting on Information Display, pp. 1108-1111, August 2007.

D.-H. Oh, D.-S. Kim, S. Kim, D.-K. Jeong, W. Kim, "A 2.8Gb/s All-Digital CDR with a 10b Monotonic DCO", In Proceedings of the IEEE International Solid-State Circuits Conference, pp.222-223, February 2007.

J.-K. Woo, H. Lee, W.-Y. Shin, H. Song, D.-K. Jeong and S. Kim, "A Fast-Locking CDR circuit with an Autonomously Reconfigurable Charge Pump and Loop Filter", In Proceedings of the IEEE Asian Solid-State Circuits Conference, pp. 411-414, November 2006.

Y.-D. Kim, H.-S. Ahn, J.-Y. Park, S. Kim, and D.-K. Jeong, "A Storage- and Power-Efficient Range-Matching TCAM for Packet Classification", In Proceedings of the IEEE International Solid-State Circuits Conference, pp.21-23, February 2006.

V. S. Sathe, J.-Y. Chueh, J. Kim, C. H. Ziesler, S. Kim, and M. C. Papaefthymiou, "Fast Efficient, Recovering, and Irreversible", In Proceedings of the ACM International Conference on Computing Frontiers, pp. 407-413, May 2005.

V. S. Sathe, C. H. Ziesler, M. C. Papaefthymiou, S. Kim, and S. V. Kosonocky, "A Synchronous Interface for SoCs with Multiple Voltage and Clock Domains", In Proceedings of the IEEE International SOC Conference, September 2004.

S. Kim, S. V. Kosonocky, D. R. Knebel, and K. Stawiasz, "Experimental measurement of a novel power gating structure with intermediate power saving mode", In Proceedings of the 2004 International Symposium on Low Power Electronics and Design, pp. 20--25, August 2004.

S.-S. Chin, S. Hong, and S. Kim, "Usage of Application-Specific Switching Activity for Energy Minimization of Arithmetic Units", In Proceedings of the IEEE Computer Annual Symposium on VLSI, February, 2004.

C. H. Ziesler, J. Kim, M. C. Papaefthymiou, and S Kim, "Energy Recovery Design for Low-Power ASICs", In Proceedings of IEEE International SOC Conference, pp. 424-427, September 2003.

S. Kim, S. V. Kosonocky, D. R. Knebel, K. Stawiasz, D. Heidel, and M. Immediato, "Minimizing Inductive Noise in System-On-a-Chip with Multiple Power Gating Structures", In Proceedings of the 29th European Solid-State Circuits Conference, pp. 635-638, September 2003.

S. Hong, S.-S. Chin, S. Kim, and W. Hwang, "Multiplier Architecture Power Consumption Characterization for Low-Power DSP Applications", In Proceedings of the 9th IEEE International Conference on Electronics, Circuits and Systems, pp.741-744, September 2002.

S. Kim, Y. Shin, S. V. Kosonocky and W. Hwang, "Long-Term Power Minimization of Dual-Vt CMOS circuits", In Proceedings of the 15th Annual 2002, IEEE International ASIC/SOC Conference, pp.323-327, September 2002.

S. Kim et al, "A Resonant Clock Generator for Single-Phase Adiabatic Systems", In Proceedings of the 2001 International Symposium on Low Power Electronics and Design, pp. 159--164, August 2001.

[First Prize in Design Contestof the 2001 ACM/IEEE DAC] S. Kim, C. H. Ziesler and M. C. Papaefthymiou, "A True Single-Phase 8-bit Adiabatic Multiplier", In Proceedings of the 38th Design Automation Conference, pp.758--763, June 2001.

S. Kim, C. H. Ziesler, and M. C. Papaefthymiou, "Design, Verification, and Test of A True Single-Phase Adiabatic Multiplier", In Proceedings of the 2001 Conference on Advanced Research in VLSI, pp.42--58, March 2001.

S. Kim, C. H. Ziesler, and M. C. Papaefthymiou, , "A Reconfigurable Pipelined IDCT for Low-Energy Video Processing", In Proceedings of the 13th Annual 2000 IEEE International ASIC/SOC Conference, pp. 13-17, September 2000.

S. Kim and M. C. Papaefthymiou, "Reconfigurable Low Energy Multiplier for Multimedia System Design", In Proceedings of the 2000 IEEE Computer Society Annual Workshop on VLSI, pp.129-134, April 2000.

S. Kim and M. C. Papaefthymiou, "Low-Energy Adder Design with Single-Phase Source-Coupled Adiabatic Logic", In Proceedings of the 1999 International Workshop on Power and Timing Modeling, Optimization and Simulation, pp.93-102, October 1999.

S. Hong, S. Kim, M. C. Papaefthymiou, and W. E. Stark, "Low-Power Parallel Multiplier Design for DSP applications through Coefficient Optimization", In Proceedings of the 12th Annual 1999 IEEE International ASIC/SOC Conference, pp.286-290, September 1999.